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--- project:ledum:start [2025/07/04 08:58] – asm sachy
+++ project:ledum:start [2025/09/01 10:51] (current) – [Ledum] joe
@@ Line 11: / Line 11: @@
 status=active
 }}
+---- dataentry project ----
+name: Ledum
+status: active
+image: {{:project:ledum:320px-ledum_palustre_bluehend.jpg}}
+----
 This project aims to design and develop a new central processing unit (CPU) with a primary focus on //correctness// and //object capabilities.// The design will prioritize formal verification techniques, ensuring the CPU’s functional correctness while introducing innovative approaches to resource management using object capabilities for improved security, efficiency, and modularity.
@@ Line 221: / Line 227: @@
     * Vector processing
       * Register treated as a vector of 4/8/16/32b long values
+    * Constant-time processing
+      * Compare-sort - order 4 registers by value in HW
+      * Hashing primitives
+      * Encrypt/decrypt primitives
   * Inctruction naming convention to be defined
   * Hex representation and opcode allocation to be defined
-  *
+  * Unused opcodes for future use