project:brain_hacking:tdcs
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- default.jpg
- 173×172
- 2016/11/25 04:37
- 6.9 KB
- dspic1_decap_lowres.jpg
- 2560×2048
- 2013/09/09 16:36
- 3.7 MB
- imgp8648.jpg
- 3872×2592
- 2018/09/24 11:10
- 3.5 MB
- imgp8650.jpg
- 3872×2592
- 2018/09/24 11:11
- 3 MB
- imgp8651.jpg
- 3872×2592
- 2018/09/24 11:11
- 3.6 MB
- imgp8653.jpg
- 3872×2592
- 2018/09/24 11:11
- 2.9 MB
- imgp8673.jpg
- 3872×2592
- 2018/09/24 11:11
- 3 MB
- imgp8679.jpg
- 3872×2592
- 2018/09/24 11:11
- 3.6 MB
- rom_i_13_fused.png
- 10112×4282
- 2018/09/24 11:28
- 58.7 MB
- rom_i.jpg
- 2528×1071
- 2015/05/13 19:26
- 1.6 MB
- rom_m1.jpg
- 2231×1851
- 2015/05/08 18:33
- 750.9 KB
- rtg_dsp1c_vaisala.png
- 438×443
- 2014/01/29 10:42
- 119.5 KB
- rtg_vaisala_1608b1.png
- 312×338
- 2014/01/29 10:42
- 51.7 KB
- side_a.png
- 726×486
- 2014/01/30 18:38
- 737.7 KB
- side_b.png
- 581×389
- 2013/06/27 18:20
- 528.7 KB
- sonde_cpu_lowres_blocks.jpg
- 3008×2000
- 2015/05/08 15:49
- 2 MB
- sonde_cpu_lowres.jpg
- 3008×2000
- 2018/09/24 11:46
- 2.3 MB
- vsdsp2_um.pdf
- 2018/09/24 11:50
- 322.4 KB
- vsdsp4_ump.pdf
- 2018/09/24 11:50
- 427.1 KB
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project/brain_hacking/tdcs.txt · Last modified: 2013/04/29 20:05 by ata